By Claude Jard, Olivier H. Roux
The elevated complexity of embedded platforms coupled with quickly layout cycles to house quicker time-to-market calls for elevated process layout productiveness that includes either model-based layout and tool-supported methodologies.
Formal equipment are mathematically-based options and supply a fresh framework within which to specific specifications and versions of the platforms, considering discrete, stochastic and non-stop (timed or hybrid) parameters with more and more effective instruments.
This publication bargains with those formal tools utilized to speaking embedded platforms by way of providing the comparable business demanding situations and the problems of modeling, model-checking, prognosis and keep an eye on synthesis, and by way of describing the most linked automatic tools.Content:
Chapter 1 types for Real?Time Embedded structures (pages 1–37): Didier Lime, Olivier H. Roux and Jiri Srba
Chapter 2 Timed Model?Checking (pages 39–66): Beatrice Berard
Chapter three keep an eye on of Timed structures (pages 67–105): Franck Cassez and Nicolas Markey
Chapter four Fault prognosis of Timed platforms (pages 107–138): Franck Cassez and Stavros Tripakis
Chapter five Quantitative Verification of Markov Chains (pages 139–163): Susanna Donatelli and Serge Haddad
Chapter 6 instruments for Model?Checking Timed structures (pages 165–225): Alexandre David, Gerd Behrmann, Peter Bulychev, Joakim Byg, Thomas Chatain, Kim G. Larsen, Paul Pettersson, Jacob Illum Rasmussen, Jiri Srba, Wang Yi, Kenneth Y. Joergensen, Didier Lime, Morgan Magnin, Olivier H. Roux and Louis?Marie Traonouez
Chapter 7 instruments for the research of Hybrid types (pages 227–251): Thao Dang, Goran Frehse, Antoine Girard and Colas Le Guernic
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Additional info for Communicating Embedded Systems: Software and Design: Formal Methods
As a ﬁnal remark, a precise delay separating a signal and the corresponding event cannot be expressed in these logics, which motivates their extensions. 2. Timed extensions Alur and Henzinger [ALU 91] proposed an excellent survey on this question. 1. Timed CTL The logic TCTL [ALU 91, ALU 93a, HEN 94b] is interpreted over timed transition systems. We consider T = R≥0 as time domain with continuous executions, which implies that the modality X is not relevant. For the subformula ϕUψ, the principle consists of associating with the modality U a constraint of the form c, for some comparison operator and a constant c, in order to constrain the occurrence time of formula ψ.
1, the system can be described in two states: initial state q0 where the burner is leaking and state q1 , where it does not leak. Leakages are detected and stopped in a time involving less than 1 second and, once it is stopped, the burner would not leak again before the expiry of 30 seconds. Clock x is used to measure the delays: the constraint x ≤ 1 in state q0 is called an invariant, the constraints x ≤ 1 and x ≤ 30 on the transitions are guards and the notation x := 0 corresponds to a reset of clock x.
Delay transitions thus correspond to the time spent in a state and for such a transition system with time domain R≥0 , the four properties mentioned above hold: zero delay, additivity, time determinism, and continuous delays. Most results concerning TA remain true, if rational constants may occur in the clock constraints: the basic case is obtained by multiplying all constants from the automaton by a common denominator. Adding diagonal constraints (of the form x−y c) to C(X) does not increase the expressiveness but leads to exponentially more concise models [BOU 05a].
Communicating Embedded Systems: Software and Design: Formal Methods by Claude Jard, Olivier H. Roux