
By Matthias Gries, Kurt Keutzer
ISBN-10: 0387260579
ISBN-13: 9780387260570
ISBN-10: 0387261281
ISBN-13: 9780387261287
An expanding variety of procedure designers are utilizing ASIP’s instead of ASIC’s to enforce their procedure suggestions. development ASIPs: The Mescal technique offers an easy yet complete method for the layout of those application-specific guideline processors (ASIPs).
The key parts of this system are:
Judiciously utilizing benchmarking
Inclusively deciding upon the architectural space
Efficiently describing and comparing the ASIPs
Comprehensively exploring the layout space
Successfully deploying the ASIP
This publication contains demonstrations of functions of the methodologies utilizing the Tipi learn framework in addition to cutting-edge advertisement toolsets from CoWare and Tensilica.
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Additional resources for Building ASIPs : the MESCAL methodology
Example text
Platforms built of ASIP components enable the next design discontinuity. We survey empirical evidence that ASIPs are a growing segment of the semiconductor market. We point to some problems in current ASIP design practice and finally outline a five-element methodology that addresses these problems. 1. 1 . What is a Design Discontinuity? 1. Design discontinuities in EDA. Periodically designers abandon their existing tool sets and migrate to an entirely new design methodology. Such a migration is rarely done voluntarily.
IP blocks may be modeled at a variety of levels. To gain full confidence in the correctness of a design it may be necessary to model and simulate the entire design at the RT level. When this is true prior productivity gains will soon be lost. Finally, because they are designed as a fixed layout, it may be difficult to integrate the implementation of hard IP blocks. Hard IP blocks are also difficult to migrate to smaller process geometries. On the other hand soft IP blocks can suffer from the same problem of RTL design in deep submicron geometries: Their precise physical properties are unknown until after place-and-route.
3 What is a Design Discontinuity? platforms built of ASIP components enable the next design discontinuity. We survey empirical evidence that ASIPs are a growing segment of the semiconductor market. We point to some problems in current ASIP design practice and finally outline a five-element methodology that addresses these problems. 1. 1 . What is a Design Discontinuity? 1. Design discontinuities in EDA. Periodically designers abandon their existing tool sets and migrate to an entirely new design methodology.
Building ASIPs : the MESCAL methodology by Matthias Gries, Kurt Keutzer
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